Debugging a New Chip

Updated (9:05 p.m.)*

I’m working on an article about a process called post-silicon debugging, something that chip makers like Intel use to catch problems in chips before they ship them out to computer makers. The goal is to find the sort of bugs that only crop up when a chip is put through the wringer. The wringer, in this case, is a setup that injects electricity into a microprocessor to simulate instructions like spell checking a document. Sounds simple enough, right? Well, not really. The picture below is a testing station for the post-silicon debugging process.

Credit: J. Stinson, Intel

*Update: Thanks to Joel Johnson of Gizmodo, this post has found a large (and informed!) audience. Some background on this picture: I got it from a Stanford researcher, Subhasish Mitra, who got it from Intel. It’s not the focus of my piece, so at the time of posting, I didn’t have a lot of information about the specifics. But since it went up some well-informed folks have chimed in (see comments).

In particular, I heard from John Cloudman, an engineering manager at Intel who has worked in post-silicon debugging. This is what he says about the image:

You have a picture of something called a logic analyzer, which is used to monitor what all the external interfaces of an integrated circuit are doing over time, since the signals are too fast or too broad to be observed with something like an oscilloscope.  The Wikipedia description over a logic analyzer is actually pretty accurate:  Generally, if one is debugging with a logic analyzer setup like this, the processor is running an operating system under relatively normal operating conditions – normal voltage, temperature, frequency.  It would be a relatively rare case to need this complex a setup.

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